[llvm] [InstSimplify] Enable FAdd simplifications when user can ignore sign bit (PR #157757)
    Nikita Popov via llvm-commits 
    llvm-commits at lists.llvm.org
       
    Wed Sep 10 01:13:02 PDT 2025
    
    
  
================
@@ -5710,7 +5710,9 @@ simplifyFAddInst(Value *Op0, Value *Op1, FastMathFlags FMF,
   // fadd X, 0 ==> X, when we know X is not -0
   if (canIgnoreSNaN(ExBehavior, FMF))
     if (match(Op1, m_PosZeroFP()) &&
-        (FMF.noSignedZeros() || cannotBeNegativeZero(Op0, Q)))
+        (FMF.noSignedZeros() || cannotBeNegativeZero(Op0, Q) ||
+         (Q.CxtI && !Q.CxtI->use_empty() &&
+          canIgnoreSignBitOfZero(*(Q.CxtI->use_begin())))))
----------------
nikic wrote:
You can't do use-based reasoning inside InstSimplify, this must happen in InstCombine.
https://github.com/llvm/llvm-project/pull/157757
    
    
More information about the llvm-commits
mailing list