[llvm] [InstSimplify] Enable FAdd simplifications when user can ignore sign bit (PR #157757)

[Vedant Paranjape via llvm-commits]

VedantParanjape wrote:

> I reviewed the failing test case (CodeGen/AMDGPU/fcanonicalize-elimination.ll) `test_fold_canonicalize_fabs_value_f32`. Since fadd X, 0 = X after the optimization, AMD backend generates v_mul_f32_e64 instead of v_and_b32_e32 for fabs. I can fix this in testcase, but doesn't this look like the ISel is wrong? mul is costlier than an and usually, is this not applicable for AMDGPU?

It seems on older arch it emits a vmax, and vmul on the newer ones. It does so to make sure fmath flags are copied over correctly.

https://github.com/llvm/llvm-project/pull/157757