[llvm] [AVR] Refactor ADIW/SBIW/MOVW instruction descriptions (NFCI) (PR #156876)

[Ben Shi via llvm-commits]

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@@ -213,18 +213,16 @@ class FLPMX<bit e, bit p, dag outs, dag ins, string asmstr, list<dag> pattern>
 // MOVWRdRr special encoding: <|0000|0001|dddd|rrrr|>
 // d = destination = 4 bits
 // r = source = 4 bits
-// (Only accepts even registers)
+// (Only accepts register pairs)
 //===----------------------------------------------------------------------===//
-class FMOVWRdRr<dag outs, dag ins, string asmstr, list<dag> pattern>
+class FMOVW<dag outs, dag ins, string asmstr, list<dag> pattern>
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benshi001 wrote:

It would be better to keep the original naming rule, most instructions are named in this tradition.

https://github.com/llvm/llvm-project/pull/156876