[llvm] [RISCV] Handle non uimm5 VL constants in isVLKnownLE (PR #156639)
Luke Lau via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 3 10:28:10 PDT 2025
================
@@ -4807,9 +4820,11 @@ bool RISCV::isVLKnownLE(const MachineOperand &LHS, const MachineOperand &RHS) {
return true;
if (LHS.isImm() && LHS.getImm() == RISCV::VLMaxSentinel)
return false;
- if (!LHS.isImm() || !RHS.isImm())
+ std::optional<int64_t> LHSImm = getEffectiveImm(LHS, MRI),
----------------
lukel97 wrote:
I originally checked for VLMaxSentinel in ADDI, but undid this in 8072205. Since in the places where we check for VLMaxSentinel we don't seem to check for ADDIs, we only consider immediate operands.
https://github.com/llvm/llvm-project/pull/156639
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