[llvm] [RISCV] Handle non uimm5 VL constants in isVLKnownLE (PR #156639)

[Philip Reames via llvm-commits]

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@@ -365,7 +365,8 @@ unsigned getDestLog2EEW(const MCInstrDesc &Desc, unsigned Log2SEW);
 static constexpr int64_t VLMaxSentinel = -1LL;
 
 /// Given two VL operands, do we know that LHS <= RHS?
-bool isVLKnownLE(const MachineOperand &LHS, const MachineOperand &RHS);
+bool isVLKnownLE(const MachineOperand &LHS, const MachineOperand &RHS,
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preames wrote:

This change adds the assumption that this routine is only called in SSA form.  Is that true?  If so, update the comment.  

https://github.com/llvm/llvm-project/pull/156639