[llvm] [RISCV] add computeKnownBitsForTargetNode for RISCVISD::SRLW (PR #155995)

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Wed Sep 3 06:14:12 PDT 2025


https://github.com/RKSimon auto_merge_enabled https://github.com/llvm/llvm-project/pull/155995


More information about the llvm-commits mailing list