[llvm] [ARM] Simplify LowerCMP (NFC) (PR #156198)

[via llvm-commits]

https://github.com/AZero13 updated https://github.com/llvm/llvm-project/pull/156198

>From 82dd83191b39fd9d81b8f0562e9116de7f1d5c2a Mon Sep 17 00:00:00 2001
From: AZero13 <gfunni234 at gmail.com>
Date: Sat, 30 Aug 2025 15:11:23 -0400
Subject: [PATCH 1/2] [ARM] Simplify LowerCMP (NFC)

Pass the opcode directly.
---
 llvm/lib/Target/ARM/ARMISelLowering.cpp | 12 ++----------
 1 file changed, 2 insertions(+), 10 deletions(-)

diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index ea74d6a2071d9..147b710d6df43 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -10539,16 +10539,8 @@ SDValue ARMTargetLowering::LowerCMP(SDValue Op, SelectionDAG &DAG) const {
   }
 
   // Generate the operation with flags
-  SDValue OpWithFlags;
-  if (Opcode == ARMISD::ADDC) {
-    // Use ADDC: LHS + RHS (where RHS was 0 - X, now X)
-    OpWithFlags = DAG.getNode(ARMISD::ADDC, dl,
-                              DAG.getVTList(MVT::i32, FlagsVT), LHS, RHS);
-  } else {
-    // Use ARMISD::SUBC to generate SUBS instruction (subtract with flags)
-    OpWithFlags = DAG.getNode(ARMISD::SUBC, dl,
-                              DAG.getVTList(MVT::i32, FlagsVT), LHS, RHS);
-  }
+  SDValue OpWithFlags = DAG.getNode(Opcode, dl,
+                                    DAG.getVTList(MVT::i32, FlagsVT), LHS, RHS);
 
   SDValue OpResult = OpWithFlags.getValue(0); // The operation result
   SDValue Flags = OpWithFlags.getValue(1);    // The flags

>From ae90b802e9cab8892bd2915ec6050e25db6779fb Mon Sep 17 00:00:00 2001
From: AZero13 <gfunni234 at gmail.com>
Date: Sat, 30 Aug 2025 15:13:17 -0400
Subject: [PATCH 2/2] Fix formatting

---
 llvm/lib/Target/ARM/ARMISelLowering.cpp | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 147b710d6df43..4ff0873126c29 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -10539,11 +10539,11 @@ SDValue ARMTargetLowering::LowerCMP(SDValue Op, SelectionDAG &DAG) const {
   }
 
   // Generate the operation with flags
-  SDValue OpWithFlags = DAG.getNode(Opcode, dl,
-                                    DAG.getVTList(MVT::i32, FlagsVT), LHS, RHS);
+  SDValue OpWithFlags =
+      DAG.getNode(Opcode, dl, DAG.getVTList(VT, FlagsVT), LHS, RHS);
 
-  SDValue OpResult = OpWithFlags.getValue(0); // The operation result
-  SDValue Flags = OpWithFlags.getValue(1);    // The flags
+  SDValue OpResult = OpWithFlags.getValue(0);
+  SDValue Flags = OpWithFlags.getValue(1);
 
   // Constants for conditional moves
   SDValue One = DAG.getConstant(1, dl, MVT::i32);