[llvm] [ARM] Add missing optimize compare candidates to isOptimizeCompareCandidates (PR #155886)

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``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp -- llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
``````````

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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
index 585edf31c..7e85af1fc 100644
--- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -2263,44 +2263,30 @@ struct AddSubFlagsOpcodePair {
 };
 
 static const AddSubFlagsOpcodePair AddSubFlagsOpcodeMap[] = {
-  {ARM::ADDSri, ARM::ADDri},
-  {ARM::ADDSrr, ARM::ADDrr},
-  {ARM::ADDSrsi, ARM::ADDrsi},
-  {ARM::ADDSrsr, ARM::ADDrsr},
-
-  {ARM::SUBSri, ARM::SUBri},
-  {ARM::SUBSrr, ARM::SUBrr},
-  {ARM::SUBSrsi, ARM::SUBrsi},
-  {ARM::SUBSrsr, ARM::SUBrsr},
-
-  {ARM::RSBSri, ARM::RSBri},
-  {ARM::RSBSrr, ARM::RSBrr},
-  {ARM::RSBSrsi, ARM::RSBrsi},
-  {ARM::RSBSrsr, ARM::RSBrsr},
-
-  {ARM::tADDSi3, ARM::tADDi3},
-  {ARM::tADDSi8, ARM::tADDi8},
-  {ARM::tADDSrr, ARM::tADDrr},
-  {ARM::tADCS, ARM::tADC},
-
-  {ARM::tSUBSi3, ARM::tSUBi3},
-  {ARM::tSUBSi8, ARM::tSUBi8},
-  {ARM::tSUBSrr, ARM::tSUBrr},
-  {ARM::tSBCS, ARM::tSBC},
-  {ARM::tRSBS, ARM::tRSB},
-  {ARM::tLSLSri, ARM::tLSLri},
-
-  {ARM::t2ADDSri, ARM::t2ADDri},
-  {ARM::t2ADDSrr, ARM::t2ADDrr},
-  {ARM::t2ADDSrs, ARM::t2ADDrs},
-
-  {ARM::t2SUBSri, ARM::t2SUBri},
-  {ARM::t2SUBSrr, ARM::t2SUBrr},
-  {ARM::t2SUBSrs, ARM::t2SUBrs},
-
-  {ARM::t2RSBSri, ARM::t2RSBri},
-  {ARM::t2RSBSrr, ARM::t2RSBrr},
-  {ARM::t2RSBSrs, ARM::t2RSBrs},
+    {ARM::ADDSri, ARM::ADDri},     {ARM::ADDSrr, ARM::ADDrr},
+    {ARM::ADDSrsi, ARM::ADDrsi},   {ARM::ADDSrsr, ARM::ADDrsr},
+
+    {ARM::SUBSri, ARM::SUBri},     {ARM::SUBSrr, ARM::SUBrr},
+    {ARM::SUBSrsi, ARM::SUBrsi},   {ARM::SUBSrsr, ARM::SUBrsr},
+
+    {ARM::RSBSri, ARM::RSBri},     {ARM::RSBSrr, ARM::RSBrr},
+    {ARM::RSBSrsi, ARM::RSBrsi},   {ARM::RSBSrsr, ARM::RSBrsr},
+
+    {ARM::tADDSi3, ARM::tADDi3},   {ARM::tADDSi8, ARM::tADDi8},
+    {ARM::tADDSrr, ARM::tADDrr},   {ARM::tADCS, ARM::tADC},
+
+    {ARM::tSUBSi3, ARM::tSUBi3},   {ARM::tSUBSi8, ARM::tSUBi8},
+    {ARM::tSUBSrr, ARM::tSUBrr},   {ARM::tSBCS, ARM::tSBC},
+    {ARM::tRSBS, ARM::tRSB},       {ARM::tLSLSri, ARM::tLSLri},
+
+    {ARM::t2ADDSri, ARM::t2ADDri}, {ARM::t2ADDSrr, ARM::t2ADDrr},
+    {ARM::t2ADDSrs, ARM::t2ADDrs},
+
+    {ARM::t2SUBSri, ARM::t2SUBri}, {ARM::t2SUBSrr, ARM::t2SUBrr},
+    {ARM::t2SUBSrs, ARM::t2SUBrs},
+
+    {ARM::t2RSBSri, ARM::t2RSBri}, {ARM::t2RSBSrr, ARM::t2RSBrr},
+    {ARM::t2RSBSrs, ARM::t2RSBrs},
 };
 
 unsigned llvm::convertAddSubFlagsOpcode(unsigned OldOpc) {

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https://github.com/llvm/llvm-project/pull/155886