[llvm] [RISCV] Add SRAW to ComputeNumSignBitsForTargetNode. (PR #155564)

[Philip Reames via llvm-commits]

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@@ -21451,8 +21451,14 @@ unsigned RISCVTargetLowering::ComputeNumSignBitsForTargetNode(
     if (Tmp < 33) return 1;
     return 33;
   }
+  case RISCVISD::SRAW: {
+    unsigned Tmp =
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preames wrote:

There's a comment just below you need to update/remove for SRAW.  

https://github.com/llvm/llvm-project/pull/155564