[llvm] [RISCV] Added ROLW/RORW/SLLW/SRAW/SRLW for canCreateUndefOrPoisonForTargetNode (PR #152609)

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 26 11:10:16 PDT 2025


RKSimon wrote:

@topperc Do you have any objections to this going in without tests?

https://github.com/llvm/llvm-project/pull/152609


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