[llvm] [RISCV] Loosen the requirement of shadow stack codegen to Zimop (PR #152251)

[Ming-Yi Lai via llvm-commits]

================
@@ -107,7 +107,7 @@ static void emitSCSPrologue(MachineFunction &MF, MachineBasicBlock &MBB,
                             const DebugLoc &DL) {
   const auto &STI = MF.getSubtarget<RISCVSubtarget>();
   bool HasHWShadowStack = MF.getFunction().hasFnAttribute("hw-shadow-stack") &&
-                          STI.hasStdExtZicfiss();
+                          STI.hasStdExtZimop();
----------------
mylai-mtk wrote:

Could you add a comment to explain why you skipped checking Zcmop despite possibly emitting C.SSPUSH down below? I get that it's a somehow complicated conclusion based on the availability of X5 at the current stage and the missing of `C.SSPOPCHK x1`, but since it's a bit complicated, I think this seemingly wrong ignorance of Zcmop deserves an explicit explanation.

My understanding of the ignorance is due to:

```c
// Here we use only `hasZimop` instead of `hasZimop || hasZcmop` to determine
// whether HW shadow stack is available, since if only Zcmop is available, we
// would need to reserve X5 due to `C.SSPOPCHK` only takes X5 and it's post-RA now.
// However, we can still aggressively use `C.SSPUSH x1` as the compressed form of
// `SSPUSH x1` if Zcmop is available.
```

https://github.com/llvm/llvm-project/pull/152251