[llvm] [AArch64] Peek through freeze in setcc if it has one_use, and is comparing against a constant (PR #153897)

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``````````bash
git-clang-format --diff HEAD~1 HEAD --extensions cpp -- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp llvm/lib/Target/AArch64/AArch64ISelLowering.cpp llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
index 170050b93..977579339 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
@@ -5212,17 +5212,16 @@ MachineInstr *AArch64InstructionSelector::tryFoldIntegerCompare(
     }
 
     if (AndDef && AndDef->getOpcode() == TargetOpcode::G_AND) {
-    // Make sure that the RHS is 0.
-    auto ValAndVReg = getIConstantVRegValWithLookThrough(RHS.getReg(), MRI);
-    if (!ValAndVReg || ValAndVReg->Value != 0)
-      return nullptr;
+      // Make sure that the RHS is 0.
+      auto ValAndVReg = getIConstantVRegValWithLookThrough(RHS.getReg(), MRI);
+      if (!ValAndVReg || ValAndVReg->Value != 0)
+        return nullptr;
 
-          return emitTST(AndDef->getOperand(1),
-                     AndDef->getOperand(2), MIRBuilder);
-  }
+      return emitTST(AndDef->getOperand(1), AndDef->getOperand(2), MIRBuilder);
+    }
 
-  return nullptr;
-}
+    return nullptr;
+  }
 
 bool AArch64InstructionSelector::selectShuffleVector(
     MachineInstr &I, MachineRegisterInfo &MRI) {

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https://github.com/llvm/llvm-project/pull/153897