[llvm] 3db1742 - [Mips] Add frexpl and sincosl to f128 libcall list

Nikita Popov via llvm-commits llvm-commits at lists.llvm.org
Fri Aug 15 03:45:21 PDT 2025


Author: Nikita Popov
Date: 2025-08-15T12:45:05+02:00
New Revision: 3db17429da63b0e33fb5dda0706d3bd024ecfe2a

URL: https://github.com/llvm/llvm-project/commit/3db17429da63b0e33fb5dda0706d3bd024ecfe2a
DIFF: https://github.com/llvm/llvm-project/commit/3db17429da63b0e33fb5dda0706d3bd024ecfe2a.diff

LOG: [Mips] Add frexpl and sincosl to f128 libcall list

Added: 
    

Modified: 
    llvm/lib/Target/Mips/MipsCCState.cpp
    llvm/test/CodeGen/Mips/llvm.frexp.ll
    llvm/test/CodeGen/Mips/llvm.sincos.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/Mips/MipsCCState.cpp b/llvm/lib/Target/Mips/MipsCCState.cpp
index 13237c556c076..d600343860b0b 100644
--- a/llvm/lib/Target/Mips/MipsCCState.cpp
+++ b/llvm/lib/Target/Mips/MipsCCState.cpp
@@ -23,9 +23,10 @@ bool MipsCCState::isF128SoftLibCall(const char *CallSym) {
       "__subtf3",      "__trunctfdf2", "__trunctfsf2",  "__unordtf2",
       "ceill",         "copysignl",    "cosl",          "exp2l",
       "expl",          "floorl",       "fmal",          "fmaxl",
-      "fmodl",         "log10l",       "log2l",         "logl",
-      "nearbyintl",    "powl",         "rintl",         "roundl",
-      "sinl",          "sqrtl",        "truncl"};
+      "fmodl",         "frexpl",       "log10l",        "log2l",
+      "logl",          "nearbyintl",   "powl",          "rintl",
+      "roundl",        "sincosl",      "sinl",          "sqrtl",
+      "truncl"};
 
   // Check that LibCalls is sorted alphabetically.
   auto Comp = [](const char *S1, const char *S2) { return strcmp(S1, S2) < 0; };

diff  --git a/llvm/test/CodeGen/Mips/llvm.frexp.ll b/llvm/test/CodeGen/Mips/llvm.frexp.ll
index 3226766492ed6..483a2540e5e01 100644
--- a/llvm/test/CodeGen/Mips/llvm.frexp.ll
+++ b/llvm/test/CodeGen/Mips/llvm.frexp.ll
@@ -493,10 +493,10 @@ define { fp128, i32 } @test_frexp_fp128_i32(fp128 %a) nounwind {
 ; SOFT-FLOAT-64:       # %bb.0:
 ; SOFT-FLOAT-64-NEXT:    daddiu $sp, $sp, -16
 ; SOFT-FLOAT-64-NEXT:    sd $ra, 8($sp) # 8-byte Folded Spill
-; SOFT-FLOAT-64-NEXT:    dmfc1 $4, $f12
-; SOFT-FLOAT-64-NEXT:    dmfc1 $5, $f13
 ; SOFT-FLOAT-64-NEXT:    jal frexpl
 ; SOFT-FLOAT-64-NEXT:    daddiu $6, $sp, 4
+; SOFT-FLOAT-64-NEXT:    dmfc1 $2, $f0
+; SOFT-FLOAT-64-NEXT:    dmfc1 $3, $f2
 ; SOFT-FLOAT-64-NEXT:    lw $4, 4($sp)
 ; SOFT-FLOAT-64-NEXT:    ld $ra, 8($sp) # 8-byte Folded Reload
 ; SOFT-FLOAT-64-NEXT:    jr $ra
@@ -597,39 +597,39 @@ define { <2 x fp128>, <2 x i32> } @test_frexp_v2fp128_v2i32(<2 x fp128> %a) noun
 ; SOFT-FLOAT-64-LABEL: test_frexp_v2fp128_v2i32:
 ; SOFT-FLOAT-64:       # %bb.0:
 ; SOFT-FLOAT-64-NEXT:    daddiu $sp, $sp, -64
-; SOFT-FLOAT-64-NEXT:    sd $ra, 56($sp) # 8-byte Folded Spill
-; SOFT-FLOAT-64-NEXT:    sd $20, 48($sp) # 8-byte Folded Spill
-; SOFT-FLOAT-64-NEXT:    sd $19, 40($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64-NEXT:    sdc1 $f25, 56($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64-NEXT:    sdc1 $f24, 48($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64-NEXT:    sd $ra, 40($sp) # 8-byte Folded Spill
 ; SOFT-FLOAT-64-NEXT:    sd $18, 32($sp) # 8-byte Folded Spill
 ; SOFT-FLOAT-64-NEXT:    sd $17, 24($sp) # 8-byte Folded Spill
 ; SOFT-FLOAT-64-NEXT:    sd $16, 16($sp) # 8-byte Folded Spill
 ; SOFT-FLOAT-64-NEXT:    move $16, $6
 ; SOFT-FLOAT-64-NEXT:    move $17, $5
 ; SOFT-FLOAT-64-NEXT:    move $18, $4
-; SOFT-FLOAT-64-NEXT:    daddiu $6, $sp, 12
-; SOFT-FLOAT-64-NEXT:    move $4, $7
+; SOFT-FLOAT-64-NEXT:    dmtc1 $7, $f12
+; SOFT-FLOAT-64-NEXT:    dmtc1 $8, $f13
 ; SOFT-FLOAT-64-NEXT:    jal frexpl
-; SOFT-FLOAT-64-NEXT:    move $5, $8
-; SOFT-FLOAT-64-NEXT:    move $19, $2
-; SOFT-FLOAT-64-NEXT:    move $20, $3
+; SOFT-FLOAT-64-NEXT:    daddiu $6, $sp, 12
+; SOFT-FLOAT-64-NEXT:    mov.d $f24, $f0
+; SOFT-FLOAT-64-NEXT:    mov.d $f25, $f2
+; SOFT-FLOAT-64-NEXT:    dmtc1 $17, $f12
+; SOFT-FLOAT-64-NEXT:    dmtc1 $16, $f13
 ; SOFT-FLOAT-64-NEXT:    daddiu $6, $sp, 8
 ; SOFT-FLOAT-64-NEXT:    lw $1, 12($sp)
-; SOFT-FLOAT-64-NEXT:    sw $1, 36($18)
-; SOFT-FLOAT-64-NEXT:    move $4, $17
 ; SOFT-FLOAT-64-NEXT:    jal frexpl
-; SOFT-FLOAT-64-NEXT:    move $5, $16
+; SOFT-FLOAT-64-NEXT:    sw $1, 36($18)
 ; SOFT-FLOAT-64-NEXT:    lw $1, 8($sp)
 ; SOFT-FLOAT-64-NEXT:    sw $1, 32($18)
-; SOFT-FLOAT-64-NEXT:    sd $20, 24($18)
-; SOFT-FLOAT-64-NEXT:    sd $19, 16($18)
-; SOFT-FLOAT-64-NEXT:    sd $3, 8($18)
-; SOFT-FLOAT-64-NEXT:    sd $2, 0($18)
+; SOFT-FLOAT-64-NEXT:    sdc1 $f25, 24($18)
+; SOFT-FLOAT-64-NEXT:    sdc1 $f24, 16($18)
+; SOFT-FLOAT-64-NEXT:    sdc1 $f2, 8($18)
+; SOFT-FLOAT-64-NEXT:    sdc1 $f0, 0($18)
 ; SOFT-FLOAT-64-NEXT:    ld $16, 16($sp) # 8-byte Folded Reload
 ; SOFT-FLOAT-64-NEXT:    ld $17, 24($sp) # 8-byte Folded Reload
 ; SOFT-FLOAT-64-NEXT:    ld $18, 32($sp) # 8-byte Folded Reload
-; SOFT-FLOAT-64-NEXT:    ld $19, 40($sp) # 8-byte Folded Reload
-; SOFT-FLOAT-64-NEXT:    ld $20, 48($sp) # 8-byte Folded Reload
-; SOFT-FLOAT-64-NEXT:    ld $ra, 56($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64-NEXT:    ld $ra, 40($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64-NEXT:    ldc1 $f24, 48($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64-NEXT:    ldc1 $f25, 56($sp) # 8-byte Folded Reload
 ; SOFT-FLOAT-64-NEXT:    jr $ra
 ; SOFT-FLOAT-64-NEXT:    daddiu $sp, $sp, 64
   %result = call { <2 x fp128>, <2 x i32> } @llvm.frexp.v2fp128.v2i32(<2 x fp128> %a)

diff  --git a/llvm/test/CodeGen/Mips/llvm.sincos.ll b/llvm/test/CodeGen/Mips/llvm.sincos.ll
index 046be12c0abe2..e0e6617afb133 100644
--- a/llvm/test/CodeGen/Mips/llvm.sincos.ll
+++ b/llvm/test/CodeGen/Mips/llvm.sincos.ll
@@ -845,12 +845,12 @@ define { fp128, fp128 } @test_sincos_f128(fp128 %a) #0 {
 ; SOFT-FLOAT-64-NEXT:    daddiu $sp, $sp, -48
 ; SOFT-FLOAT-64-NEXT:    sd $ra, 40($sp) # 8-byte Folded Spill
 ; SOFT-FLOAT-64-NEXT:    sd $16, 32($sp) # 8-byte Folded Spill
+; SOFT-FLOAT-64-NEXT:    mov.d $f12, $f13
 ; SOFT-FLOAT-64-NEXT:    move $16, $4
-; SOFT-FLOAT-64-NEXT:    dmfc1 $4, $f13
-; SOFT-FLOAT-64-NEXT:    dmfc1 $5, $f14
 ; SOFT-FLOAT-64-NEXT:    daddiu $6, $sp, 16
-; SOFT-FLOAT-64-NEXT:    jal sincosl
 ; SOFT-FLOAT-64-NEXT:    daddiu $7, $sp, 0
+; SOFT-FLOAT-64-NEXT:    jal sincosl
+; SOFT-FLOAT-64-NEXT:    mov.d $f13, $f14
 ; SOFT-FLOAT-64-NEXT:    ld $1, 8($sp)
 ; SOFT-FLOAT-64-NEXT:    sd $1, 24($16)
 ; SOFT-FLOAT-64-NEXT:    ld $1, 0($sp)
@@ -1001,20 +1001,19 @@ define { <2 x fp128>, <2 x fp128> } @test_sincos_v2f128(<2 x fp128> %a) #0 {
 ; SOFT-FLOAT-64-NEXT:    sd $18, 80($sp) # 8-byte Folded Spill
 ; SOFT-FLOAT-64-NEXT:    sd $17, 72($sp) # 8-byte Folded Spill
 ; SOFT-FLOAT-64-NEXT:    sd $16, 64($sp) # 8-byte Folded Spill
-; SOFT-FLOAT-64-NEXT:    move $1, $7
 ; SOFT-FLOAT-64-NEXT:    move $16, $6
 ; SOFT-FLOAT-64-NEXT:    move $17, $5
 ; SOFT-FLOAT-64-NEXT:    move $18, $4
+; SOFT-FLOAT-64-NEXT:    dmtc1 $7, $f12
+; SOFT-FLOAT-64-NEXT:    dmtc1 $8, $f13
 ; SOFT-FLOAT-64-NEXT:    daddiu $6, $sp, 48
-; SOFT-FLOAT-64-NEXT:    daddiu $7, $sp, 32
-; SOFT-FLOAT-64-NEXT:    move $4, $1
 ; SOFT-FLOAT-64-NEXT:    jal sincosl
-; SOFT-FLOAT-64-NEXT:    move $5, $8
+; SOFT-FLOAT-64-NEXT:    daddiu $7, $sp, 32
+; SOFT-FLOAT-64-NEXT:    dmtc1 $17, $f12
+; SOFT-FLOAT-64-NEXT:    dmtc1 $16, $f13
 ; SOFT-FLOAT-64-NEXT:    daddiu $6, $sp, 16
-; SOFT-FLOAT-64-NEXT:    daddiu $7, $sp, 0
-; SOFT-FLOAT-64-NEXT:    move $4, $17
 ; SOFT-FLOAT-64-NEXT:    jal sincosl
-; SOFT-FLOAT-64-NEXT:    move $5, $16
+; SOFT-FLOAT-64-NEXT:    daddiu $7, $sp, 0
 ; SOFT-FLOAT-64-NEXT:    ld $1, 56($sp)
 ; SOFT-FLOAT-64-NEXT:    ld $2, 0($sp)
 ; SOFT-FLOAT-64-NEXT:    ld $3, 8($sp)


        


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