[llvm] [DAG][ARM] computeKnownBitsForTargetNode - add handling for ARMISD VORRIMM\VBICIMM nodes (PR #149494)
via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 15 01:35:35 PDT 2025
https://github.com/woruyu updated https://github.com/llvm/llvm-project/pull/149494
>From dc660c619d479edc682272eb39e91dad4d2311d5 Mon Sep 17 00:00:00 2001
From: woruyu <1214539920 at qq.com>
Date: Fri, 18 Jul 2025 18:55:21 +0800
Subject: [PATCH 1/4] [DAG][ARM] computeKnownBitsForTargetNode - add handling
for ARMISD VORRIMM\VBICIMM nodes
---
llvm/lib/Target/ARM/ARMISelLowering.cpp | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 8ea567cfb9d31..59c819a74abe8 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -20084,6 +20084,31 @@ void ARMTargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
Known = KnownOp0.intersectWith(KnownOp1);
break;
}
+ case ARMISD::VORRIMM: {
+ KnownBits KnownLHS = DAG.computeKnownBits(Op.getOperand(0), Depth + 1);
+
+ unsigned Encoded = Op.getConstantOperandVal(1);
+ unsigned ElemSize = Op.getValueType().getScalarSizeInBits();
+ uint64_t DecodedVal = ARM_AM::decodeVMOVModImm(Encoded, ElemSize);
+ APInt Imm(Known.getBitWidth(), DecodedVal);
+
+ Known.One = KnownLHS.One | Imm;
+ Known.Zero = KnownLHS.Zero & ~Imm;
+ return;
+ }
+ case ARMISD::VBICIMM: {
+ KnownBits KnownLHS = DAG.computeKnownBits(Op.getOperand(0), Depth + 1);
+
+ unsigned Encoded = Op.getConstantOperandVal(1);
+ unsigned ElemSize = Op.getValueType().getScalarSizeInBits();
+ uint64_t DecodedVal = ARM_AM::decodeVMOVModImm(Encoded, ElemSize);
+ APInt Imm(Known.getBitWidth(), DecodedVal);
+
+ APInt NotImm = ~Imm;
+ Known.One = KnownLHS.One & NotImm;
+ Known.Zero = KnownLHS.Zero | Imm;
+ return;
+ }
}
}
>From 1cd3a56a2ed09c92d7e3b00c4ff702908862803e Mon Sep 17 00:00:00 2001
From: woruyu <1214539920 at qq.com>
Date: Mon, 21 Jul 2025 10:43:20 +0800
Subject: [PATCH 2/4] fix: review
---
llvm/lib/Target/ARM/ARMISelLowering.cpp | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 59c819a74abe8..7640270ebb934 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -20088,9 +20088,9 @@ void ARMTargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
KnownBits KnownLHS = DAG.computeKnownBits(Op.getOperand(0), Depth + 1);
unsigned Encoded = Op.getConstantOperandVal(1);
- unsigned ElemSize = Op.getValueType().getScalarSizeInBits();
+ unsigned ElemSize = Op.getScalarValueSizeInBits();
uint64_t DecodedVal = ARM_AM::decodeVMOVModImm(Encoded, ElemSize);
- APInt Imm(Known.getBitWidth(), DecodedVal);
+ APInt Imm(ElemSize, DecodedVal);
Known.One = KnownLHS.One | Imm;
Known.Zero = KnownLHS.Zero & ~Imm;
@@ -20100,9 +20100,9 @@ void ARMTargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
KnownBits KnownLHS = DAG.computeKnownBits(Op.getOperand(0), Depth + 1);
unsigned Encoded = Op.getConstantOperandVal(1);
- unsigned ElemSize = Op.getValueType().getScalarSizeInBits();
+ unsigned ElemSize = Op.getScalarValueSizeInBits();
uint64_t DecodedVal = ARM_AM::decodeVMOVModImm(Encoded, ElemSize);
- APInt Imm(Known.getBitWidth(), DecodedVal);
+ APInt Imm(ElemSize, DecodedVal);
APInt NotImm = ~Imm;
Known.One = KnownLHS.One & NotImm;
>From e8e0ba254647ea1786161f4739de71bc5d020b72 Mon Sep 17 00:00:00 2001
From: woruyu <1214539920 at qq.com>
Date: Fri, 15 Aug 2025 15:35:42 +0800
Subject: [PATCH 3/4] test: add ARMSelectionDAGTest
---
.../Target/ARM/ARMSelectionDAGTest.cpp | 128 ++++++++++++++++++
llvm/unittests/Target/ARM/CMakeLists.txt | 1 +
2 files changed, 129 insertions(+)
create mode 100644 llvm/unittests/Target/ARM/ARMSelectionDAGTest.cpp
diff --git a/llvm/unittests/Target/ARM/ARMSelectionDAGTest.cpp b/llvm/unittests/Target/ARM/ARMSelectionDAGTest.cpp
new file mode 100644
index 0000000000000..aa1d8730b8c3c
--- /dev/null
+++ b/llvm/unittests/Target/ARM/ARMSelectionDAGTest.cpp
@@ -0,0 +1,128 @@
+#include "ARMISelLowering.h"
+#include "MCTargetDesc/ARMAddressingModes.h"
+#include "llvm/Analysis/OptimizationRemarkEmitter.h"
+#include "llvm/AsmParser/Parser.h"
+#include "llvm/CodeGen/MachineModuleInfo.h"
+#include "llvm/CodeGen/SelectionDAG.h"
+#include "llvm/CodeGen/TargetLowering.h"
+#include "llvm/IR/MDBuilder.h"
+#include "llvm/IR/Module.h"
+#include "llvm/MC/TargetRegistry.h"
+#include "llvm/Support/KnownBits.h"
+#include "llvm/Support/SourceMgr.h"
+#include "llvm/Support/TargetSelect.h"
+#include "llvm/Target/TargetMachine.h"
+#include "gtest/gtest.h"
+
+namespace llvm {
+
+class ARMSelectionDAGTest : public testing::Test {
+protected:
+ static void SetUpTestCase() {
+ LLVMInitializeARMTargetInfo();
+ LLVMInitializeARMTarget();
+ LLVMInitializeARMTargetMC();
+ }
+
+ void SetUp() override {
+ StringRef Assembly = "define void @f() { ret void }";
+
+ Triple TargetTriple("armv7-unknown-none-eabi");
+
+ std::string Error;
+ const Target *T = TargetRegistry::lookupTarget("", TargetTriple, Error);
+
+ TargetOptions Options;
+ TM = std::unique_ptr<TargetMachine>(
+ T->createTargetMachine(TargetTriple,
+ /*CPU*/ "cortex-a9",
+ /*Features*/ "+neon", Options, std::nullopt,
+ std::nullopt, CodeGenOptLevel::Aggressive));
+
+ SMDiagnostic SMError;
+ M = parseAssemblyString(Assembly, SMError, Context);
+ if (!M)
+ report_fatal_error(SMError.getMessage());
+ M->setDataLayout(TM->createDataLayout());
+
+ F = M->getFunction("f");
+ if (!F)
+ report_fatal_error("Function 'f' not found");
+
+ MachineModuleInfo MMI(TM.get());
+
+ MF = std::make_unique<MachineFunction>(*F, *TM, *TM->getSubtargetImpl(*F),
+ MMI.getContext(), /*FunctionNum*/ 0);
+
+ DAG = std::make_unique<SelectionDAG>(*TM, CodeGenOptLevel::None);
+ if (!DAG)
+ report_fatal_error("SelectionDAG allocation failed");
+
+ OptimizationRemarkEmitter ORE(F);
+ DAG->init(*MF, ORE, /*LibInfo*/ nullptr, /*AA*/ nullptr,
+ /*AC*/ nullptr, /*MDT*/ nullptr, /*MSDT*/ nullptr, MMI, nullptr);
+ }
+
+ TargetLoweringBase::LegalizeTypeAction getTypeAction(EVT VT) {
+ return DAG->getTargetLoweringInfo().getTypeAction(Context, VT);
+ }
+
+ EVT getTypeToTransformTo(EVT VT) {
+ return DAG->getTargetLoweringInfo().getTypeToTransformTo(Context, VT);
+ }
+
+ LLVMContext Context;
+ std::unique_ptr<TargetMachine> TM;
+ std::unique_ptr<Module> M;
+ Function *F = nullptr;
+ std::unique_ptr<MachineFunction> MF;
+ std::unique_ptr<SelectionDAG> DAG;
+};
+
+TEST_F(ARMSelectionDAGTest, computeKnownBits_VORRIMM) {
+ SDLoc DL;
+ EVT VT = EVT::getVectorVT(Context, EVT::getIntegerVT(Context, 32), 2);
+
+ SDValue LHS = DAG->getConstant(0, DL, VT);
+
+ unsigned Encoded = 0xF0;
+ SDValue EncSD = DAG->getTargetConstant(Encoded, DL, MVT::i32);
+ SDValue Op = DAG->getNode(ARMISD::VORRIMM, DL, VT, LHS, EncSD);
+
+ APInt DemandedElts(/*numBits=*/2, /*val=*/3);
+
+ KnownBits Known = DAG->computeKnownBits(Op, DemandedElts);
+
+ unsigned ElemBits = 32;
+ uint64_t Decoded = ARM_AM::decodeVMOVModImm(Encoded, ElemBits);
+ APInt Imm(32, Decoded);
+
+ EXPECT_EQ(Known.One, Imm);
+ EXPECT_EQ(Known.Zero, ~Imm);
+}
+
+TEST_F(ARMSelectionDAGTest, computeKnownBits_VBICIMM) {
+ SDLoc DL;
+ EVT VT = EVT::getVectorVT(Context, EVT::getIntegerVT(Context, 32), 2);
+
+ APInt AllOnes(32, 0);
+ AllOnes.setAllBits();
+ SDValue LHS = DAG->getConstant(AllOnes, DL, VT);
+
+ unsigned Encoded = 0xF0;
+ SDValue EncSD = DAG->getTargetConstant(Encoded, DL, MVT::i32);
+ SDValue Op = DAG->getNode(ARMISD::VBICIMM, DL, VT, LHS, EncSD);
+
+ APInt DemandedElts(2, 3);
+
+ KnownBits Known = DAG->computeKnownBits(Op, DemandedElts);
+
+ unsigned ElemBits = 32;
+ uint64_t Decoded = ARM_AM::decodeVMOVModImm(Encoded, ElemBits);
+ APInt Imm(32, Decoded);
+
+ EXPECT_EQ(Known.One, ~Imm);
+ EXPECT_EQ(Known.Zero, Imm);
+}
+
+} // end namespace llvm
diff --git a/llvm/unittests/Target/ARM/CMakeLists.txt b/llvm/unittests/Target/ARM/CMakeLists.txt
index 5da249708abf9..1bd2eda4e23c9 100644
--- a/llvm/unittests/Target/ARM/CMakeLists.txt
+++ b/llvm/unittests/Target/ARM/CMakeLists.txt
@@ -22,4 +22,5 @@ set(LLVM_LINK_COMPONENTS
add_llvm_target_unittest(ARMTests
MachineInstrTest.cpp
InstSizes.cpp
+ ARMSelectionDAGTest.cpp
)
>From f5c8ea659753d6910e19b244547f15b9cf71050e Mon Sep 17 00:00:00 2001
From: woruyu <1214539920 at qq.com>
Date: Fri, 15 Aug 2025 16:33:09 +0800
Subject: [PATCH 4/4] fix: review
---
llvm/unittests/Target/ARM/ARMSelectionDAGTest.cpp | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/llvm/unittests/Target/ARM/ARMSelectionDAGTest.cpp b/llvm/unittests/Target/ARM/ARMSelectionDAGTest.cpp
index aa1d8730b8c3c..ac302684ea678 100644
--- a/llvm/unittests/Target/ARM/ARMSelectionDAGTest.cpp
+++ b/llvm/unittests/Target/ARM/ARMSelectionDAGTest.cpp
@@ -1,3 +1,10 @@
+//===----------------------------------------------------------------------===//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
#include "ARMISelLowering.h"
#include "MCTargetDesc/ARMAddressingModes.h"
#include "llvm/Analysis/OptimizationRemarkEmitter.h"
@@ -89,7 +96,7 @@ TEST_F(ARMSelectionDAGTest, computeKnownBits_VORRIMM) {
SDValue EncSD = DAG->getTargetConstant(Encoded, DL, MVT::i32);
SDValue Op = DAG->getNode(ARMISD::VORRIMM, DL, VT, LHS, EncSD);
- APInt DemandedElts(/*numBits=*/2, /*val=*/3);
+ APInt DemandedElts = APInt::getAllOnes(2);
KnownBits Known = DAG->computeKnownBits(Op, DemandedElts);
@@ -105,15 +112,14 @@ TEST_F(ARMSelectionDAGTest, computeKnownBits_VBICIMM) {
SDLoc DL;
EVT VT = EVT::getVectorVT(Context, EVT::getIntegerVT(Context, 32), 2);
- APInt AllOnes(32, 0);
- AllOnes.setAllBits();
+ APInt AllOnes = APInt::getAllOnes(32);
SDValue LHS = DAG->getConstant(AllOnes, DL, VT);
unsigned Encoded = 0xF0;
SDValue EncSD = DAG->getTargetConstant(Encoded, DL, MVT::i32);
SDValue Op = DAG->getNode(ARMISD::VBICIMM, DL, VT, LHS, EncSD);
- APInt DemandedElts(2, 3);
+ APInt DemandedElts = APInt::getAllOnes(2);
KnownBits Known = DAG->computeKnownBits(Op, DemandedElts);
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