[llvm] [AArch64][GISel] Use emitIntegerCompare instead of emitting SUBS directly every time (PR #153659)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 14 13:35:19 PDT 2025
https://github.com/AZero13 updated https://github.com/llvm/llvm-project/pull/153659
>From 11fe8ec4483127b1b8b639beb332266ec3bcfb44 Mon Sep 17 00:00:00 2001
From: AZero13 <gfunni234 at gmail.com>
Date: Thu, 14 Aug 2025 15:43:57 -0400
Subject: [PATCH 1/6] [AArch64] Use emitIntegerCompare instead of emitting SUBS
directly every time
Also, pass the same operands to it as we do in SelDAG, same with emitFPCompare.
---
.../lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
index ee34a85a5b507..691fabbd1ac67 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
@@ -4965,11 +4965,9 @@ MachineInstr *AArch64InstructionSelector::emitConjunctionRec(
// Produce a normal comparison if we are first in the chain
if (!CCOp) {
- auto Dst = MRI.cloneVirtualRegister(LHS);
if (isa<GICmp>(Cmp))
- return emitSUBS(Dst, Cmp->getOperand(2), Cmp->getOperand(3), MIB);
- return emitFPCompare(Cmp->getOperand(2).getReg(),
- Cmp->getOperand(3).getReg(), MIB);
+ return emitIntegerCompare(LHS, RHS, CC, MIB);
+ return emitFPCompare(LHS, RHS, MIB, CC);
}
// Otherwise produce a ccmp.
return emitConditionalComparison(LHS, RHS, CC, Predicate, OutCC, MIB);
>From d993783ed6e2c8a1a0c65273fcd5f650dd868dc2 Mon Sep 17 00:00:00 2001
From: AZero13 <gfunni234 at gmail.com>
Date: Thu, 14 Aug 2025 16:05:07 -0400
Subject: [PATCH 2/6] OK
---
llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
index 691fabbd1ac67..b4f4cf3343294 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
@@ -4966,7 +4966,8 @@ MachineInstr *AArch64InstructionSelector::emitConjunctionRec(
// Produce a normal comparison if we are first in the chain
if (!CCOp) {
if (isa<GICmp>(Cmp))
- return emitIntegerCompare(LHS, RHS, CC, MIB);
+ return emitIntegerCompare(Cmp->getOperand(2), Cmp->getOperand(3), CC,
+ MIB);
return emitFPCompare(LHS, RHS, MIB, CC);
}
// Otherwise produce a ccmp.
>From 51817ffedb5109962aa1c55c02713dcbc497a40c Mon Sep 17 00:00:00 2001
From: AZero13 <gfunni234 at gmail.com>
Date: Thu, 14 Aug 2025 16:22:06 -0400
Subject: [PATCH 3/6] Update AArch64InstructionSelector.cpp
---
.../AArch64/GISel/AArch64InstructionSelector.cpp | 13 ++++++++++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
index b4f4cf3343294..992c84a45db3c 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
@@ -4965,9 +4965,16 @@ MachineInstr *AArch64InstructionSelector::emitConjunctionRec(
// Produce a normal comparison if we are first in the chain
if (!CCOp) {
- if (isa<GICmp>(Cmp))
- return emitIntegerCompare(Cmp->getOperand(2), Cmp->getOperand(3), CC,
- MIB);
+ if (isa<GICmp>(Cmp)) {
+ auto &Pred = Cmp->getOperand(1);
+ MachineInstr *Ret = emitIntegerCompare(
+ Cmp->getOperand(2), Cmp->getOperand(3), Pred, MIB);
+
+ // Change OutCC in case emitIntegerCompare() changed it.
+ OutCC =
+ changeICMPPredToAArch64CC(Pred.getPredicate(), RHS, MIB.getMRI());
+ return Ret;
+ }
return emitFPCompare(LHS, RHS, MIB, CC);
}
// Otherwise produce a ccmp.
>From 16bdc708d4e33c69e7cfabf696b250f599fa6c12 Mon Sep 17 00:00:00 2001
From: AZero13 <gfunni234 at gmail.com>
Date: Thu, 14 Aug 2025 16:22:36 -0400
Subject: [PATCH 4/6] Format
---
llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
index 992c84a45db3c..a02ad6bade2e5 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
@@ -4967,8 +4967,8 @@ MachineInstr *AArch64InstructionSelector::emitConjunctionRec(
if (!CCOp) {
if (isa<GICmp>(Cmp)) {
auto &Pred = Cmp->getOperand(1);
- MachineInstr *Ret = emitIntegerCompare(
- Cmp->getOperand(2), Cmp->getOperand(3), Pred, MIB);
+ MachineInstr *Ret = emitIntegerCompare(Cmp->getOperand(2),
+ Cmp->getOperand(3), Pred, MIB);
// Change OutCC in case emitIntegerCompare() changed it.
OutCC =
>From bd8f9a53316dbc2bb8bced546ea0e9b6cc79628e Mon Sep 17 00:00:00 2001
From: AZero13 <gfunni234 at gmail.com>
Date: Thu, 14 Aug 2025 16:34:27 -0400
Subject: [PATCH 5/6] OK
---
llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
index a02ad6bade2e5..755ba7f4d6090 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
@@ -4971,8 +4971,10 @@ MachineInstr *AArch64InstructionSelector::emitConjunctionRec(
Cmp->getOperand(3), Pred, MIB);
// Change OutCC in case emitIntegerCompare() changed it.
+ auto PredOp = static_cast<CmpInst::Predicate>(Pred.getPredicate());
+
OutCC =
- changeICMPPredToAArch64CC(Pred.getPredicate(), RHS, MIB.getMRI());
+ changeICMPPredToAArch64CC(PredOp, CondDef->getOperand(3).getReg(), MIB.getMRI());
return Ret;
}
return emitFPCompare(LHS, RHS, MIB, CC);
>From 94706c75d11398474c7aa206dc7ac2fc2eb72eaf Mon Sep 17 00:00:00 2001
From: AZero13 <gfunni234 at gmail.com>
Date: Thu, 14 Aug 2025 16:35:05 -0400
Subject: [PATCH 6/6] Update AArch64InstructionSelector.cpp
---
llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
index 755ba7f4d6090..8647fb9f52080 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
@@ -4973,8 +4973,8 @@ MachineInstr *AArch64InstructionSelector::emitConjunctionRec(
// Change OutCC in case emitIntegerCompare() changed it.
auto PredOp = static_cast<CmpInst::Predicate>(Pred.getPredicate());
- OutCC =
- changeICMPPredToAArch64CC(PredOp, CondDef->getOperand(3).getReg(), MIB.getMRI());
+ OutCC = changeICMPPredToAArch64CC(
+ PredOp, CondDef->getOperand(3).getReg(), MIB.getMRI());
return Ret;
}
return emitFPCompare(LHS, RHS, MIB, CC);
More information about the llvm-commits
mailing list