[llvm] 16ad202 - [TargetLowering] Store Context in variable (NFC)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 14 08:13:40 PDT 2025
Author: Nikita Popov
Date: 2025-08-14T17:13:31+02:00
New Revision: 16ad20291dad174e441076c4c10d899b333fc0e7
URL: https://github.com/llvm/llvm-project/commit/16ad20291dad174e441076c4c10d899b333fc0e7
DIFF: https://github.com/llvm/llvm-project/commit/16ad20291dad174e441076c4c10d899b333fc0e7.diff
LOG: [TargetLowering] Store Context in variable (NFC)
Avoid repeating CLI.RetTy->getContext() many times.
Added:
Modified:
llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index 366a230eef952..76694987aeaca 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -10981,6 +10981,8 @@ static AttributeList getReturnAttrs(TargetLowering::CallLoweringInfo &CLI) {
/// migrated to using LowerCall, this hook should be integrated into SDISel.
std::pair<SDValue, SDValue>
TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
+ LLVMContext &Context = CLI.RetTy->getContext();
+
// Handle the incoming return values from the call.
CLI.Ins.clear();
SmallVector<Type *, 4> RetOrigTys;
@@ -11004,8 +11006,8 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
for (size_t i = 0, e = OldRetTys.size(); i != e; ++i) {
EVT RetVT = OldRetTys[i];
uint64_t Offset = OldOffsets[i];
- MVT RegisterVT = getRegisterType(CLI.RetTy->getContext(), RetVT);
- unsigned NumRegs = getNumRegisters(CLI.RetTy->getContext(), RetVT);
+ MVT RegisterVT = getRegisterType(Context, RetVT);
+ unsigned NumRegs = getNumRegisters(Context, RetVT);
unsigned RegisterVTByteSZ = RegisterVT.getSizeInBits() / 8;
RetOrigTys.append(NumRegs, OldRetOrigTys[i]);
RetTys.append(NumRegs, RegisterVT);
@@ -11019,7 +11021,7 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
bool CanLowerReturn =
this->CanLowerReturn(CLI.CallConv, CLI.DAG.getMachineFunction(),
- CLI.IsVarArg, Outs, CLI.RetTy->getContext(), CLI.RetTy);
+ CLI.IsVarArg, Outs, Context, CLI.RetTy);
SDValue DemoteStackSlot;
int DemoteStackIdx = -100;
@@ -11032,8 +11034,7 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
MachineFunction &MF = CLI.DAG.getMachineFunction();
DemoteStackIdx =
MF.getFrameInfo().CreateStackObject(TySize, Alignment, false);
- Type *StackSlotPtrType =
- PointerType::get(CLI.RetTy->getContext(), DL.getAllocaAddrSpace());
+ Type *StackSlotPtrType = PointerType::get(Context, DL.getAllocaAddrSpace());
DemoteStackSlot = CLI.DAG.getFrameIndex(DemoteStackIdx, getFrameIndexTy(DL));
ArgListEntry Entry;
@@ -11055,7 +11056,7 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
CLI.getArgs().insert(CLI.getArgs().begin(), Entry);
CLI.NumFixedArgs += 1;
CLI.getArgs()[0].IndirectType = CLI.RetTy;
- CLI.RetTy = Type::getVoidTy(CLI.RetTy->getContext());
+ CLI.RetTy = Type::getVoidTy(Context);
// sret demotion isn't compatible with tail-calls, since the sret argument
// points into the callers stack frame.
@@ -11071,10 +11072,9 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
Flags.setInConsecutiveRegsLast();
}
EVT VT = RetTys[I];
- MVT RegisterVT = getRegisterTypeForCallingConv(CLI.RetTy->getContext(),
- CLI.CallConv, VT);
- unsigned NumRegs = getNumRegistersForCallingConv(CLI.RetTy->getContext(),
- CLI.CallConv, VT);
+ MVT RegisterVT = getRegisterTypeForCallingConv(Context, CLI.CallConv, VT);
+ unsigned NumRegs =
+ getNumRegistersForCallingConv(Context, CLI.CallConv, VT);
for (unsigned i = 0; i != NumRegs; ++i) {
ISD::InputArg Ret(Flags, RegisterVT, VT, RetOrigTys[I],
CLI.IsReturnValueUsed, ISD::InputArg::NoArgIndex, 0);
@@ -11102,7 +11102,7 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
ISD::ArgFlagsTy Flags;
Flags.setSwiftError();
ISD::InputArg Ret(Flags, getPointerTy(DL), EVT(getPointerTy(DL)),
- PointerType::getUnqual(CLI.RetTy->getContext()),
+ PointerType::getUnqual(Context),
/*Used=*/true, ISD::InputArg::NoArgIndex, 0);
CLI.Ins.push_back(Ret);
}
@@ -11213,10 +11213,9 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
if (NeedsRegBlock)
Flags.setInConsecutiveRegs();
- MVT PartVT = getRegisterTypeForCallingConv(CLI.RetTy->getContext(),
- CLI.CallConv, VT);
- unsigned NumParts = getNumRegistersForCallingConv(CLI.RetTy->getContext(),
- CLI.CallConv, VT);
+ MVT PartVT = getRegisterTypeForCallingConv(Context, CLI.CallConv, VT);
+ unsigned NumParts =
+ getNumRegistersForCallingConv(Context, CLI.CallConv, VT);
SmallVector<SDValue, 4> Parts(NumParts);
ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
@@ -11346,10 +11345,9 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
AssertOp = ISD::AssertZext;
unsigned CurReg = 0;
for (EVT VT : RetTys) {
- MVT RegisterVT = getRegisterTypeForCallingConv(CLI.RetTy->getContext(),
- CLI.CallConv, VT);
- unsigned NumRegs = getNumRegistersForCallingConv(CLI.RetTy->getContext(),
- CLI.CallConv, VT);
+ MVT RegisterVT = getRegisterTypeForCallingConv(Context, CLI.CallConv, VT);
+ unsigned NumRegs =
+ getNumRegistersForCallingConv(Context, CLI.CallConv, VT);
ReturnValues.push_back(getCopyFromParts(
CLI.DAG, CLI.DL, &InVals[CurReg], NumRegs, RegisterVT, VT, nullptr,
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