[llvm] 4c28bbf - [AArch64] Fix ‘>= 0’ is always true warning. NFC
David Green via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 14 00:17:14 PDT 2025
Author: David Green
Date: 2025-08-14T08:17:10+01:00
New Revision: 4c28bbf5b84ffdad8ffe80c9c934b03a1435c1f1
URL: https://github.com/llvm/llvm-project/commit/4c28bbf5b84ffdad8ffe80c9c934b03a1435c1f1
DIFF: https://github.com/llvm/llvm-project/commit/4c28bbf5b84ffdad8ffe80c9c934b03a1435c1f1.diff
LOG: [AArch64] Fix ‘>= 0’ is always true warning. NFC
Added:
Modified:
llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
index fb59c9f131fb2..a55f103bff385 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
@@ -5920,7 +5920,7 @@ static MCCFIInstruction createDefCFAExpression(const TargetRegisterInfo &TRI,
// Build up the expression (Reg + NumBytes + VG * NumVGScaledBytes)
SmallString<64> Expr;
unsigned DwarfReg = TRI.getDwarfRegNum(Reg, true);
- assert(DwarfReg >= 0 && DwarfReg <= 31 && "DwarfReg out of bounds (0..31)");
+ assert(DwarfReg <= 31 && "DwarfReg out of bounds (0..31)");
// Reg + NumBytes
Expr.push_back(dwarf::DW_OP_breg0 + DwarfReg);
appendLEB128<LEB128Sign::Signed>(Expr, NumBytes);
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