[llvm] [AMDGPU] Add NV bit to CPol::ALL mask. NFCI. (PR #153487)

[Stanislav Mekhanoshin via llvm-commits]

https://github.com/rampitec updated https://github.com/llvm/llvm-project/pull/153487

>From 8b1618eec49fe4866985f638de159b4816fdcc04 Mon Sep 17 00:00:00 2001
From: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: Wed, 13 Aug 2025 13:17:33 -0700
Subject: [PATCH] [AMDGPU] Add NV bit to CPol::ALL mask. NFCI.

---
 llvm/lib/Target/AMDGPU/SIDefines.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/lib/Target/AMDGPU/SIDefines.h b/llvm/lib/Target/AMDGPU/SIDefines.h
index 2d0102fffe5ea..04aec3d14efdf 100644
--- a/llvm/lib/Target/AMDGPU/SIDefines.h
+++ b/llvm/lib/Target/AMDGPU/SIDefines.h
@@ -407,7 +407,7 @@ enum CPol {
 
   SCAL = 1 << 11, // Scale offset bit
 
-  ALL = TH | SCOPE,
+  ALL = TH | SCOPE | NV,
 
   // Helper bits
   TH_TYPE_LOAD = 1 << 7,    // TH_LOAD policy