[llvm] [AMDGPU] Add NV bit to CPol::ALL mask. NFCI. (PR #153487)

[via llvm-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-amdgpu

Author: Stanislav Mekhanoshin (rampitec)

<details>
<summary>Changes</summary>



---
Full diff: https://github.com/llvm/llvm-project/pull/153487.diff


1 Files Affected:

- (modified) llvm/lib/Target/AMDGPU/SIDefines.h (+1-1) 


``````````diff
diff --git a/llvm/lib/Target/AMDGPU/SIDefines.h b/llvm/lib/Target/AMDGPU/SIDefines.h
index 2d0102fffe5ea..04aec3d14efdf 100644
--- a/llvm/lib/Target/AMDGPU/SIDefines.h
+++ b/llvm/lib/Target/AMDGPU/SIDefines.h
@@ -407,7 +407,7 @@ enum CPol {
 
   SCAL = 1 << 11, // Scale offset bit
 
-  ALL = TH | SCOPE,
+  ALL = TH | SCOPE | NV,
 
   // Helper bits
   TH_TYPE_LOAD = 1 << 7,    // TH_LOAD policy

``````````

</details>


https://github.com/llvm/llvm-project/pull/153487