[llvm] 7317e3c - [NFC][RISCV] Correct signed/unsigned in Comment

[Sam Elliott via llvm-commits]

Author: Sam Elliott
Date: 2025-08-12T16:17:22-07:00
New Revision: 7317e3c9ddd698a3c6b67477b6f4b967ee8fc2de

URL: https://github.com/llvm/llvm-project/commit/7317e3c9ddd698a3c6b67477b6f4b967ee8fc2de
DIFF: https://github.com/llvm/llvm-project/commit/7317e3c9ddd698a3c6b67477b6f4b967ee8fc2de.diff

LOG: [NFC][RISCV] Correct signed/unsigned in Comment

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index aaa68517ccc1c..57ca687df5f6c 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -2525,7 +2525,8 @@ static void translateSetCCForBranch(const SDLoc &DL, SDValue &LHS, SDValue &RHS,
     case ISD::SETUGT:
       if (Subtarget.hasVendorXqcibi() && C != INT64_MAX && isUInt<16>(C + 1)) {
         // We have a branch immediate instruction for SETUGE but not SETUGT.
-        // Convert X > C to X >= C + 1, if (C + 1) is a 16-bit signed immediate.
+        // Convert X > C to X >= C + 1, if (C + 1) is a 16-bit unsigned
+        // immediate.
         RHS = DAG.getConstant(C + 1, DL, RHS.getValueType());
         CC = ISD::SETUGE;
         return;