[llvm] [SelectionDAG] Add `f16` soft promotion for `lrint` and `lround` (PR #152684)

[Matt Arsenault via llvm-commits]

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@@ -3729,10 +3730,20 @@ bool DAGTypeLegalizer::SoftPromoteHalfOperand(SDNode *N, unsigned OpNo) {
     Res = SoftPromoteHalfOp_FAKE_USE(N, OpNo);
     break;
   case ISD::FCOPYSIGN:  Res = SoftPromoteHalfOp_FCOPYSIGN(N, OpNo); break;
+  case ISD::FP_TO_SINT:
+  case ISD::FP_TO_UINT:
+  case ISD::LLRINT:
+  case ISD::LLROUND:
+  case ISD::LRINT:
+  case ISD::LROUND:
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arsenm wrote:

Test changes seem to only cover lrint and llrint, and not lround/llround 

https://github.com/llvm/llvm-project/pull/152684