[llvm] [InstCombine] Fold `lshr -> zext -> shl` patterns (PR #147737)

[Yingwei Zheng via llvm-commits]

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@@ -1062,14 +1153,18 @@ Instruction *InstCombinerImpl::visitShl(BinaryOperator &I) {
   if (match(Op1, m_APInt(C))) {
     unsigned ShAmtC = C->getZExtValue();
 
-    // shl (zext X), C --> zext (shl X, C)
-    // This is only valid if X would have zeros shifted out.
     Value *X;
     if (match(Op0, m_OneUse(m_ZExt(m_Value(X))))) {
+      // shl (zext X), C --> zext (shl X, C)
+      // This is only valid if X would have zeros shifted out.
       unsigned SrcWidth = X->getType()->getScalarSizeInBits();
       if (ShAmtC < SrcWidth &&
           MaskedValueIsZero(X, APInt::getHighBitsSet(SrcWidth, ShAmtC), &I))
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dtcxzyw wrote:

Can you file a separate patch to cache computeKnownBits' result with `WithCache`?


https://github.com/llvm/llvm-project/pull/147737