[llvm] [SPIRV] Create a new OpSelect selector and fix register types. (PR #152311)

[Nathan Gauër via llvm-commits]

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@@ -2564,8 +2577,54 @@ Register SPIRVInstructionSelector::buildOnesVal(bool AllOnes,
 
 bool SPIRVInstructionSelector::selectSelect(Register ResVReg,
                                             const SPIRVType *ResType,
-                                            MachineInstr &I,
-                                            bool IsSigned) const {
+                                            MachineInstr &I) const {
+  bool IsFloatTy =
+      GR.isScalarOrVectorOfType(I.getOperand(2).getReg(), SPIRV::OpTypeFloat) ||
+      GR.isScalarOrVectorOfType(I.getOperand(3).getReg(), SPIRV::OpTypeFloat);
+
+  bool IsPtrTy =
+      GR.isScalarOrVectorOfType(I.getOperand(2).getReg(),
+                                SPIRV::OpTypePointer) ||
+      GR.isScalarOrVectorOfType(I.getOperand(3).getReg(), SPIRV::OpTypePointer);
+  bool IsVectorTy =
+      GR.getSPIRVTypeForVReg(I.getOperand(2).getReg())->getOpcode() ==
+          SPIRV::OpTypeVector ||
+      GR.getSPIRVTypeForVReg(I.getOperand(3).getReg())->getOpcode() ==
+          SPIRV::OpTypeVector;
+
+  bool IsScalarBool =
+      GR.isScalarOfType(I.getOperand(1).getReg(), SPIRV::OpTypeBool);
+  unsigned Opcode;
+  if (IsVectorTy) {
+    if (IsFloatTy) {
+      Opcode = IsScalarBool ? SPIRV::OpSelectVFSCond : SPIRV::OpSelectVFVCond;
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Keenuts wrote:

I see, thanks for the context!

https://github.com/llvm/llvm-project/pull/152311