[llvm] AMDGPU: Add new VA inline asm constraint for AV registers (PR #152665)

[Stanislav Mekhanoshin via llvm-commits]

rampitec wrote:

> You can use it for srcA and srcB. If you try to misuse this with the wrong operand, you will fail in the assembler (just as you would if you incorrectly specified a VGPR for an operand that requires an SGPR).

It's a little different from misuse of a constraint in another cases. Using 'a' where only 'v' is allowed is an user error and fill fail at asm. But using 'av' for C and D of MFMA is not an error, yet RA may allocate registers of different types for both and it will also fail in asm.

Why is this needed in the first place? For example we do not have a 'vs' constraint.

https://github.com/llvm/llvm-project/pull/152665