[llvm] [AMDGPU] Restrict packed math FP32 instructions to read only one SGPR per operand on gfx12+ (PR #152465)

Stanislav Mekhanoshin via llvm-commits llvm-commits at lists.llvm.org
Thu Aug 7 16:13:39 PDT 2025

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https://github.com/rampitec closed https://github.com/llvm/llvm-project/pull/152465

Previous message: [llvm] [AMDGPU] Restrict packed math FP32 instructions to read only one SGPR per operand on gfx12+ (PR #152465)
Next message: [llvm] [NFC][Offload] Move conformance test warning outside of function (PR #152466)
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