[llvm] [ARM] Have IntCCToARMCC handle PL or MI (NFC) (PR #150247)

[via llvm-commits]

https://github.com/AZero13 updated https://github.com/llvm/llvm-project/pull/150247

>From 0919a5c32f82dec6e330df2a6b409dd824669eb8 Mon Sep 17 00:00:00 2001
From: Rose <gfunni234 at gmail.com>
Date: Wed, 23 Jul 2025 12:00:21 -0400
Subject: [PATCH] [ARM] Have IntCCToARMCC handle PL or MI (NFC)

Do not know if it is safe for the other uses to use PL or MI (not sure which RHS they use) so for now they are false.
---
 llvm/lib/Target/ARM/ARMISelLowering.cpp | 25 ++++++-------------------
 1 file changed, 6 insertions(+), 19 deletions(-)

diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index ea99cc4424aea..2f033cd786ff0 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -2026,14 +2026,16 @@ static bool isS16(const SDValue &Op, SelectionDAG &DAG) {
 }
 
 /// IntCCToARMCC - Convert a DAG integer condition code to an ARM CC
-static ARMCC::CondCodes IntCCToARMCC(ISD::CondCode CC) {
+static ARMCC::CondCodes IntCCToARMCC(ISD::CondCode CC, SDValue RHS = {}) {
   switch (CC) {
   default: llvm_unreachable("Unknown condition code!");
   case ISD::SETNE:  return ARMCC::NE;
   case ISD::SETEQ:  return ARMCC::EQ;
   case ISD::SETGT:  return ARMCC::GT;
-  case ISD::SETGE:  return ARMCC::GE;
-  case ISD::SETLT:  return ARMCC::LT;
+  case ISD::SETGE:
+    return (RHS && isNullConstant(RHS)) ? ARMCC::PL : ARMCC::GE;
+  case ISD::SETLT:
+    return (RHS && isNullConstant(RHS)) ? ARMCC::MI : ARMCC::LT;
   case ISD::SETLE:  return ARMCC::LE;
   case ISD::SETUGT: return ARMCC::HI;
   case ISD::SETUGE: return ARMCC::HS;
@@ -4934,22 +4936,7 @@ SDValue ARMTargetLowering::getARMCmp(SDValue LHS, SDValue RHS, ISD::CondCode CC,
     return Shift.getValue(1);
   }
 
-  ARMCC::CondCodes CondCode = IntCCToARMCC(CC);
-
-  // If the RHS is a constant zero then the V (overflow) flag will never be
-  // set. This can allow us to simplify GE to PL or LT to MI, which can be
-  // simpler for other passes (like the peephole optimiser) to deal with.
-  if (isNullConstant(RHS)) {
-    switch (CondCode) {
-      default: break;
-      case ARMCC::GE:
-        CondCode = ARMCC::PL;
-        break;
-      case ARMCC::LT:
-        CondCode = ARMCC::MI;
-        break;
-    }
-  }
+  ARMCC::CondCodes CondCode = IntCCToARMCC(CC, RHS);
 
   ARMISD::NodeType CompareType;
   switch (CondCode) {