[llvm] [IA][RISCV] Recognize deinterleaved loads that could lower to strided segmented loads (PR #151612)

[Min-Yih Hsu via llvm-commits]

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@@ -556,34 +570,85 @@ bool InterleavedAccessImpl::lowerInterleavedStore(
   return true;
 }
 
-static Value *getMask(Value *WideMask, unsigned Factor,
-                      ElementCount LeafValueEC) {
+// A wide mask <1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0> could be used to skip the
+// last field in a factor-of-three interleaved store or deinterleaved load (in
+// which case LeafMaskLen is 4). Such (wide) mask is also known as gap mask.
+// This helper function tries to detect this pattern and return the actual
+// factor we're accessing, which is 2 in this example.
+static unsigned getGapMaskFactor(const Constant &MaskConst, unsigned Factor,
+                                 unsigned LeafMaskLen) {
+  APInt FactorMask(Factor, 0);
+  FactorMask.setAllBits();
+  for (unsigned F = 0U; F < Factor; ++F) {
+    unsigned Idx;
+    for (Idx = 0U; Idx < LeafMaskLen; ++Idx) {
+      Constant *C = MaskConst.getAggregateElement(F + Idx * Factor);
+      if (!C->isZeroValue())
+        break;
+    }
+    // All mask bits on this field are zero, skipping it.
+    if (Idx >= LeafMaskLen)
+      FactorMask.clearBit(F);
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mshockwave wrote:

Agree. Fixed.

https://github.com/llvm/llvm-project/pull/151612