[llvm] [CodeGen] MachineVerifier to check early-clobber constraint (PR #151421)

[Abhay Kanhere via llvm-commits]

https://github.com/AbhayKanhere updated https://github.com/llvm/llvm-project/pull/151421

>From 4612f91cee5a11f1e66ca9984f1de7f608b8be5e Mon Sep 17 00:00:00 2001
From: Abhay Kanhere <abhay at kanhere.net>
Date: Wed, 30 Jul 2025 16:23:35 -0700
Subject: [PATCH 1/2] [CodeGen] MachineVerifier to check early-clobber
 constraint

Currently MachineVerifier is missing verifying early-clobber operand
constraint. The only other machine operand constraint -  TiedTo is
already verified.
---
 llvm/lib/CodeGen/MachineVerifier.cpp | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp
index 01703fe09b79a..ebef1c9034f4a 100644
--- a/llvm/lib/CodeGen/MachineVerifier.cpp
+++ b/llvm/lib/CodeGen/MachineVerifier.cpp
@@ -2325,6 +2325,13 @@ void MachineVerifier::visitMachineInstrBefore(const MachineInstr *MI) {
       report("Missing mayStore flag", MI);
   }
 
+  // Verify earlyClobber def operand
+  if (MCID.getOperandConstraint(0, MCOI::EARLY_CLOBBER) != -1) {
+    if (!MI->getOperand(0).isReg())
+      report("Early clobber must be a register", MI);
+    if (!MI->getOperand(0).isEarlyClobber())
+      report("Missing earlyClobber flag", MI);
+  }
   // Debug values must not have a slot index.
   // Other instructions must have one, unless they are inside a bundle.
   if (LiveInts) {

>From a0a0504a820d040423a2bd540f73602ec616953f Mon Sep 17 00:00:00 2001
From: Abhay Kanhere <abhay at kanhere.net>
Date: Mon, 4 Aug 2025 10:35:16 -0700
Subject: [PATCH 2/2] MAD_U64_U32 set early-clobber - Machine verifier

Fix the test failure with this PR
---
 llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp | 1 +
 1 file changed, 1 insertion(+)

diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
index 1a63c48e3666c..8a6ef89a4a062 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
@@ -584,6 +584,7 @@ bool AMDGPUInstructionSelector::selectG_AMDGPU_MAD_64_32(
   I.setDesc(TII.get(Opc));
   I.addOperand(*MF, MachineOperand::CreateImm(0));
   I.addImplicitDefUseOperands(*MF);
+  I.getOperand(0).setIsEarlyClobber(true);
   return constrainSelectedInstRegOperands(I, TII, TRI, RBI);
 }