[llvm] [RISCV] Implement EmitTargetCodeForMemset for Xqcilsm (PR #151555)
Sam Elliott via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 31 10:51:24 PDT 2025
================
@@ -62,3 +64,102 @@ void RISCVSelectionDAGInfo::verifyTargetNode(const SelectionDAG &DAG,
}
#endif
}
+
+SDValue RISCVSelectionDAGInfo::EmitTargetCodeForMemset(
+ SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src,
+ SDValue Size, Align Alignment, bool isVolatile, bool AlwaysInline,
+ MachinePointerInfo DstPtrInfo) const {
+ const RISCVSubtarget &Subtarget =
+ DAG.getMachineFunction().getSubtarget<RISCVSubtarget>();
+ // We currently do this only for Xqcilsm
+ if (!Subtarget.hasVendorXqcilsm())
+ return SDValue();
+
+ // Do this only if we know the size at compile time.
+ ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
+ if (!ConstantSize)
+ return SDValue();
+
+ uint64_t NumberOfBytesToWrite = ConstantSize->getZExtValue();
+
+ // Do this only if it is word aligned and we write multiple of 4 bytes.
+ if (!((Alignment.value() & 3) == 0 && (NumberOfBytesToWrite & 3) == 0))
+ return SDValue();
+
+ SmallVector<SDValue, 8> OutChains;
+ SDValue SizeWords, OffsetSetwmi;
+ SDValue SrcValueReplicated = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
+ int NumberOfWords = NumberOfBytesToWrite / 4;
+
+ // Helper for constructing the QC_SETWMI instruction
+ auto getSetwmiNode = [&](SDValue SizeWords, SDValue OffsetSetwmi) -> SDValue {
+ SDValue Ops[] = {Chain, SrcValueReplicated, Dst, SizeWords, OffsetSetwmi};
+ return DAG.getNode(RISCVISD::QC_SETWMI, dl, MVT::Other, Ops);
+ };
+
+ bool IsZeroVal =
+ isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isZero();
+
+ // If i8 type and constant non-zero value.
+ if ((Src.getValueType() == MVT::i8) && !IsZeroVal)
+ // Replicate byte to word by multiplication with 0x01010101.
+ SrcValueReplicated = DAG.getNode(ISD::MUL, dl, MVT::i32, SrcValueReplicated,
+ DAG.getConstant(16843009, dl, MVT::i32));
----------------
lenary wrote:
```suggestion
DAG.getConstant(0x01010101ul, dl, MVT::i32));
```
https://github.com/llvm/llvm-project/pull/151555
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