[llvm] [RISCV] Implement EmitTargetCodeForMemset for Xqcilsm (PR #151555)

Sam Elliott via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 31 10:51:23 PDT 2025


================
@@ -14,6 +14,14 @@
 // Operand and SDNode transformation definitions.
 //===----------------------------------------------------------------------===//
 
+def SDT_StoreMultiple : SDTypeProfile<0, 4, [SDTCisSameAs<0, 1>,
+                                             SDTCisSameAs<1, 3>,
+                                             SDTCisPtrTy<2>,
+                                             SDTCisVT<3, XLenVT>]>;
+
+def qc_setwmi : RVSDNode<"QC_SETWMI", SDT_StoreMultiple,
+                         [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
----------------
lenary wrote:

```suggestion
def SDT_SetMultiple : SDTypeProfile<0, 4, [SDTCisSameAs<0, 1>,
                                           SDTCisSameAs<1, 3>,
                                           SDTCisPtrTy<2>,
                                           SDTCisVT<3, XLenVT>]>;

def qc_setwmi : RVSDNode<"QC_SETWMI", SDT_SetMultiple,
                         [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
```

https://github.com/llvm/llvm-project/pull/151555


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