[llvm] [AMDGPU] Legalize 64bit elements for BUILD_VECTOR on gfx942 (PR #145052)

[Janek van Oirschot via llvm-commits]

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@@ -14385,6 +14404,27 @@ SITargetLowering::performExtractVectorEltCombine(SDNode *N,
     }
   }
 
+  // if PeekThoughBitcast(Vec)[MapIdx(CIdx)] == undef &&
+  //    VecEltSize < PeekThroughEltSize, then
+  // EXTRACT_VECTOR_ELT(bitcast(build_vector(..., undef, ...)), CIdx) => undef
+  auto *IndexC = dyn_cast<ConstantSDNode>(N->getOperand(1));
+  SDValue PeekThroughVec = peekThroughBitcasts(Vec);
+  EVT PeekThroughVecVT = PeekThroughVec.getValueType();
+  if (IndexC && PeekThroughVec.getOpcode() == ISD::BUILD_VECTOR &&
+      PeekThroughVecVT.isFixedLengthVector()) {
+    EVT PeekThroughVecEltVT = PeekThroughVecVT.getVectorElementType();
+    // Small elt size vectors to big elt size vectors are the cases covered for
+    // now (e.g., v4i32 bitcast(v2i64)) which may be conservative.
+    if (VecEltSize < PeekThroughVecEltVT.getSizeInBits()) {
+      unsigned IndexVal = IndexC->getZExtValue();
+      unsigned MappedIndexVal =
+          getMappedVectorIndex(IndexVal, VecVT, PeekThroughVecVT);
+      SDValue PeekThroughElt = PeekThroughVec.getOperand(MappedIndexVal);
+      if (PeekThroughElt.isUndef())
+        return DAG.getUNDEF(VecEltVT);
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JanekvO wrote:

Sorry, I'm probably missing something; where is the poison coming from? Is there a test case that is missing that would trigger this combine with a poison value?

https://github.com/llvm/llvm-project/pull/145052