[llvm] [AArch64] Support symmetric complex deinterleaving with higher factors (PR #151295)

[Igor Kirillov via llvm-commits]

================
@@ -0,0 +1,76 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
----------------
igogo-x86 wrote:

I suppose this patch doesn't affect fixed-width? This test shows the same output before and after patch

https://github.com/llvm/llvm-project/pull/151295