[llvm] [AArch64] Keep floating-point conversion in SIMD (PR #147707)

[Paul Walker via llvm-commits]

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@@ -24026,6 +24026,66 @@ static SDValue combineBoolVectorAndTruncateStore(SelectionDAG &DAG,
                       Store->getMemOperand());
 }
 
+// Combine store (fp_to_int X) with to use vector semantics around the
+// conversion when NEON is available.
+static SDValue combineStoreValueFPToInt(StoreSDNode *ST,
+                                        TargetLowering::DAGCombinerInfo &DCI,
+                                        SelectionDAG &DAG,
+                                        const AArch64Subtarget *Subtarget) {
+  // Limit to post-legalization in order to avoid peeling truncating stores.
+  if (DCI.isBeforeLegalize())
+    return {};
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paulwalker-arm wrote:

It's more typical to use `return SDValue()` for early returns.

https://github.com/llvm/llvm-project/pull/147707