[llvm] [X86][GlobalISel] Improve carry value selection (PR #146586)

[Evgenii Kudriashov via llvm-commits]

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@@ -1253,9 +1253,28 @@ bool X86InstructionSelector::selectUAddSub(MachineInstr &I,
       .addReg(X86::EFLAGS);
 
   if (!constrainSelectedInstRegOperands(Inst, TII, TRI, RBI) ||
-      !RBI.constrainGenericRegister(CarryOutReg, *DstRC, MRI))
+      !RBI.constrainGenericRegister(CarryOutReg, *CarryRC, MRI))
     return false;
 
+  // If there are instructions that use carry as value, we need to lower it
+  // differently than setting EFLAGS
+  Register SetCarryCC;
+  for (auto &Use :
+       llvm::make_early_inc_range(MRI.use_nodbg_operands(CarryOutReg))) {
+    MachineInstr *MI = Use.getParent();
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e-kud wrote:

Yeah, so it looks like if we meet operations with carry bits in the selector we have to lower a carry bit into GPR. Otherwise it should be lowered into target opcodes by combiners.

https://github.com/llvm/llvm-project/pull/146586