[llvm] [TableGen] Strengthen check for what operands can be an immediate in CompressInstEmitter. (PR #150568)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 24 19:50:00 PDT 2025
https://github.com/topperc created https://github.com/llvm/llvm-project/pull/150568
Registers can be represented by RegisterOperand, not just RegisterClass. Instead of trying to block certain classes, only allow Operand.
>From ec88686f798900cb154214e166daaa1c997853d8 Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Thu, 24 Jul 2025 18:46:05 -0700
Subject: [PATCH] [TableGen] Strengthen check for what operands can be an
immediate in CompressInstEmitter.
Registers can be represented by RegisterOperand, not just
RegisterClass. Instead of trying to block certain classes, only
allow Operand.
---
llvm/utils/TableGen/CompressInstEmitter.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/utils/TableGen/CompressInstEmitter.cpp b/llvm/utils/TableGen/CompressInstEmitter.cpp
index 4665a964bd9e7..b2429664783b9 100644
--- a/llvm/utils/TableGen/CompressInstEmitter.cpp
+++ b/llvm/utils/TableGen/CompressInstEmitter.cpp
@@ -269,7 +269,7 @@ void CompressInstEmitter::addDagOperandMapping(const Record *Rec,
OperandMap[OpNo].Kind = OpData::Operand;
} else if (const auto *II = dyn_cast<IntInit>(Dag->getArg(DAGOpNo))) {
// Validate that corresponding instruction operand expects an immediate.
- if (OpndRec->isSubClassOf("RegisterClass"))
+ if (!OpndRec->isSubClassOf("Operand"))
PrintFatalError(Rec->getLoc(), "Error in Dag '" + Dag->getAsString() +
"' Found immediate: '" +
II->getAsString() +
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