[llvm] [AMDGPU] Add option to prevent insns straddling half cache-line boundaries (PR #150239)

[Matt Arsenault via llvm-commits]

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@@ -274,12 +274,72 @@ static void emitVGPRBlockComment(const MachineInstr *MI, const SIInstrInfo *TII,
   OS.emitRawComment(" transferring at most " + TransferredRegs);
 }
 
+extern cl::opt<bool> PreventHalfCacheLineStraddling;
+
+static unsigned getMCInstSizeInBytes(const MCInst &LoweredMCI,
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arsenm wrote:

We should not be creating a temporary MCCodeEmitter to get the size of a single instruction; this was previously under EXPENSIVE_CHECKS for a reason 

https://github.com/llvm/llvm-project/pull/150239