[llvm] [RISCV][TTI] Enable masked interleave vectorization (PR #150074)

[Luke Lau via llvm-commits]

lukel97 wrote:

In the other PR @Mel-Chen found a latent correctness issue with how we leave around header masks, which with this PR is probably enough to cause miscompiles if we don't convert the loads/stores to VP intrinsics. I've filed an issue for it here: #150197. 

https://github.com/llvm/llvm-project/pull/150074