[llvm] [AArch64][CodeGen] Optimize register zero initialization in svsub_x (PR #149840)

[Paul Walker via llvm-commits]

paulwalker-arm wrote:

> I believe this should trigger:
> 
> https://github.com/llvm/llvm-project/blob/579a80784d43f4c21ac4ee2df221ba4f3b98fd70/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp#L2790
> 
> You will need to run `opt -passes=instcombine`, it is not usually ran as part of the backend. From your command line maybe try adding `-mtriple=aarch64 -mattr=+sve2`?

The relevant code is further up, see `simplifySVEIntrinsic()`. This function makes use of `simplifyBinOp()` so I'd expect it to already handle the common cases.  Following David's suggesting and running `opt -mtriple=aarch64 --passes=instcombine` across the PR's test file shows the combines kicking in.

https://github.com/llvm/llvm-project/pull/149840