[llvm] [NVPTX] Eliminate `prmt`s that result from `BUILD_VECTOR` of `LoadV2` (PR #149581)
Alex MacLean via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 18 13:23:10 PDT 2025
================
@@ -5833,6 +5834,80 @@ PerformBUILD_VECTORCombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) {
return DAG.getBitcast(VT, PRMT);
}
+static SDValue
+PerformBUILD_VECTOROfTargetLoadCombine(SDNode *N,
+ TargetLowering::DAGCombinerInfo &DCI) {
+ // Match: BUILD_VECTOR of v4i8, where first two elements are from a
+ // NVPTXISD::LoadV2 or NVPTXISD::LDUV2 of i8, and the last two elements are
+ // zero constants. Replace with: zext the loaded i16 to i32, and return as a
+ // bitcast to v4i8.
----------------
AlexMaclean wrote:
This seems like a very specific and uncommon occurrence and the test cases look a bit contrived. Is this something we're going to see in real programs?
https://github.com/llvm/llvm-project/pull/149581
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