[llvm] [NVPTX] Eliminate `prmt`s that result from `BUILD_VECTOR` of `LoadV2` (PR #149581)

Artem Belevich via llvm-commits llvm-commits at lists.llvm.org
Fri Jul 18 13:20:03 PDT 2025


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@@ -5833,6 +5834,80 @@ PerformBUILD_VECTORCombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) {
   return DAG.getBitcast(VT, PRMT);
 }
 
+static SDValue
+PerformBUILD_VECTOROfTargetLoadCombine(SDNode *N,
+                                       TargetLowering::DAGCombinerInfo &DCI) {
+  // Match: BUILD_VECTOR of v4i8, where first two elements are from a
+  // NVPTXISD::LoadV2 or NVPTXISD::LDUV2 of i8, and the last two elements are
+  // zero constants. Replace with: zext the loaded i16 to i32, and return as a
+  // bitcast to v4i8.
----------------
Artem-B wrote:

This appears to be an oddly specific pattern with two specific elements loaded, and two specific constants. Is that a particularly common pattern? Where does it come from, if so?

https://github.com/llvm/llvm-project/pull/149581


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