[llvm] [AArch64] Add zero cycle register move statistics (PR #149033)

[via llvm-commits]

github-actions[bot] wrote:

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``````````bash
git-clang-format --diff HEAD~1 HEAD --extensions cpp -- llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
index 4082c86cc..9a33784cf 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
@@ -5317,7 +5317,7 @@ void AArch64InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
           .addReg(SrcReg)
           .addReg(SrcReg, getKillRegState(KillSrc));
       // if (Subtarget.hasZeroCycleRegMoveFPR128()) { need rebase
-        ++NumZeroCycleRegMoveFPR128;
+      ++NumZeroCycleRegMoveFPR128;
       // }
     } else {
       BuildMI(MBB, I, DL, get(AArch64::STRQpre))

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https://github.com/llvm/llvm-project/pull/149033