[lld] [llvm] [LoongArch] Add supplemental release notes for LLVM 21 (PR #148771)

[via llvm-commits]

https://github.com/Ami-zhang updated https://github.com/llvm/llvm-project/pull/148771

>From cafd04b506e1d969e2f373d05d0f65eb56bd7a2e Mon Sep 17 00:00:00 2001
From: Ami-zhang <zhanglimin at loongson.cn>
Date: Tue, 15 Jul 2025 10:47:54 +0800
Subject: [PATCH] [LoongArch] Add supplemental release notes for LLVM 21

---
 lld/docs/ReleaseNotes.rst | 4 ++++
 llvm/docs/ReleaseNotes.md | 4 ++++
 2 files changed, 8 insertions(+)

diff --git a/lld/docs/ReleaseNotes.rst b/lld/docs/ReleaseNotes.rst
index 69ed57d67615c..863b201891006 100644
--- a/lld/docs/ReleaseNotes.rst
+++ b/lld/docs/ReleaseNotes.rst
@@ -70,6 +70,10 @@ ELF Improvements
   not provided in the command line by the user and cannot be inferred from
   inputs.
 * For LoongArch, the initial-exec to local-exec TLS optimization has been implemented.
+* For LoongArch, several relaxation optimizations are supported, including relaxation for
+  ``R_LARCH_PCALA_HI20/LO12`` and ``R_LARCH_GOT_PC_HI20/LO12`` relocations, instruction
+  relaxation for ``R_LARCH_CALL36``, TLS local-exec (``LE``)/global dynamic (``GD``)/
+  local dynamic (``LD``) model relaxation, and TLSDESC code sequence relaxation.
 * For RISCV, an oscillation bug due to call relaxation is now fixed.
   (`#142899 <https://github.com/llvm/llvm-project/pull/142899>`_)
 * For x86-64, the ``.ltext`` section is now placed before ``.rodata``.
diff --git a/llvm/docs/ReleaseNotes.md b/llvm/docs/ReleaseNotes.md
index 43ed85db0315c..5cf4e992b68ad 100644
--- a/llvm/docs/ReleaseNotes.md
+++ b/llvm/docs/ReleaseNotes.md
@@ -145,6 +145,10 @@ Changes to the LoongArch Backend
 
 * Changing the default code model from `small` to `medium` for 64-bit.
 * Added inline asm support for the `q` constraint.
+* Added the `32s` target feature for LA32S ISA extensions.
+* Added codegen support for atomic-ops (`cmpxchg`, `max`, `min`, `umax`, `umin`) on LA32.
+* Added codegen support for the ILP32D calling convention.
+* Added several codegen and vectorization optimizations.
 
 Changes to the MIPS Backend
 ---------------------------