[llvm] [RISCV] Add ISel patterns for Xqciac QC_SHLADD instruction (PR #148256)

[Sam Elliott via llvm-commits]

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@@ -1359,6 +1359,12 @@ class SelectQCbi<CondCode Cond, DAGOperand InTyImm, Pseudo OpNode >
 let Predicates = [HasVendorXqciac, IsRV32] in {
 def : Pat<(XLenVT (add GPRNoX0:$rd, (mul GPRNoX0:$rs1, simm12:$imm12))),
           (QC_MULIADD GPRNoX0:$rd, GPRNoX0:$rs1, simm12:$imm12)>;
+foreach i = 4-31 in {
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lenary wrote:

Yeah we should be able to use `uimm5gt3` as it is an immleaf already.

https://github.com/llvm/llvm-project/pull/148256