[llvm] [AArch64] Keep floating-point conversion in SIMD (PR #147707)
David Sherwood via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 10 02:21:49 PDT 2025
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@@ -6598,6 +6598,18 @@ def : Pat<(f64 (AArch64frsqrts (f64 FPR64:$Rn), (f64 FPR64:$Rm))),
def : Pat<(v2f64 (AArch64frsqrts (v2f64 FPR128:$Rn), (v2f64 FPR128:$Rm))),
(FRSQRTSv2f64 FPR128:$Rn, FPR128:$Rm)>;
+let HasOneUse = 1 in {
+def fp_to_uint_oneuse : PatFrag<(ops node:$src0), (fp_to_uint $src0)>;
+def fp_to_sint_oneuse : PatFrag<(ops node:$src0), (fp_to_sint $src0)>;
+}
+
+class StoreMaybeAssertZext<PatFrag op> : PatFrags<(ops node:$val, node:$ptr),
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david-arm wrote:
Given this is specifically related to truncating stores, perhaps worth renaming to TruncStoreMaybeAssertZext?
Also, is it possible to add one for assertsext? I don't know if that comes up in practice.
https://github.com/llvm/llvm-project/pull/147707
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