[llvm] [msan] Check mask and rounding mode in handleAVX512VectorConvertFPToInt (PR #147782)

[Thurston Dang via llvm-commits]

================
@@ -4406,8 +4406,10 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
 
     assert(Mask->getType()->isIntegerTy());
     assert(Mask->getType()->getScalarSizeInBits() == ANumElements);
+    insertCheckShadowOf(Mask, &I);
 
     assert(RoundingMode->getType()->isIntegerTy());
+    insertCheckShadowOf(RoundingMode, &I);
----------------
thurstond wrote:

I think technically only 4 out of the 16 bits are used, though I would think mistakes were made if someone was intentionally only initializing the necessary bits. (I expect the rounding mode is more commonly a constant e.g., as seen in avx512-intrinsics.ll. In that case, the shadow check is actually elided.)

https://github.com/llvm/llvm-project/pull/147782