[llvm] [AMDGPU] Support merging 16-bit TBUFFER load/store instruction (PR #145078)

[Jay Foad via llvm-commits]

================
@@ -839,8 +839,16 @@ void SILoadStoreOptimizer::CombineInfo::setMI(MachineBasicBlock::iterator MI,
     Offset = I->getOperand(OffsetIdx).getImm();
   }
 
-  if (InstClass == TBUFFER_LOAD || InstClass == TBUFFER_STORE)
+  if (InstClass == TBUFFER_LOAD || InstClass == TBUFFER_STORE) {
     Format = LSO.TII->getNamedOperand(*I, AMDGPU::OpName::format)->getImm();
+    const AMDGPU::GcnBufferFormatInfo *Info =
+        AMDGPU::getGcnBufferFormatInfo(Format, *LSO.STM);
+
+    // TODO: Support merging 8-bit tbuffer load/store instructions
+    // Use 2-byte element size if the tbuffer format is 16-bit.
+    if (Info && Info->BitsPerComp == 16)
+      EltSize = 2;
----------------
jayfoad wrote:

Can `` ever fail? (Why?) Can we simplify this to:
```suggestion
    EltSize = Info->BitsPerComp / 8;
```
?

https://github.com/llvm/llvm-project/pull/145078