[llvm] [RISCV] Use QC.INSBI for OR with immediate when ORI isn't possible (PR #147349)
Sudharsan Veeravalli via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 7 22:00:32 PDT 2025
================
@@ -681,6 +681,43 @@ bool RISCVDAGToDAGISel::trySignedBitfieldExtract(SDNode *Node) {
return false;
}
+bool RISCVDAGToDAGISel::trySignedBitfieldInsertInMask(SDNode *Node) {
+ // Supported only in Xqcibm for now.
+ if (!Subtarget->hasVendorXqcibm())
+ return false;
+
+ auto *N1C = dyn_cast<ConstantSDNode>(Node->getOperand(1));
+ if (!N1C)
+ return false;
+
+ int32_t C1 = N1C->getSExtValue();
+ if (!(isShiftedMask_32(C1) && !isInt<12>(C1)))
----------------
svs-quic wrote:
Done.
https://github.com/llvm/llvm-project/pull/147349
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