[llvm] [SelectionDAG] Deal with POISON for INSERT_VECTOR_ELT/INSERT_SUBVECTOR (part 1) (PR #143102)

[Simon Pilgrim via llvm-commits]

RKSimon wrote:

One thing that is hurting us is the freeze getting in between a load and ext prevent a extload forming:
```
t13: i8,ch = load<(load (s8) from %ir.p2)> t0, t6, undef:i64
t47: i8 = freeze t13
t14: i16 = sign_extend t47
```
I'm not certain but it'd be great if we were allowed to fold these to:
```
t13: i16,ch = load<(load (s8) from %ir.p2), sext from i8> t0, t6, undef:i64
t47: i16 = freeze t13
t14: i16 = assertsext t47, MVT::i8
```
WDYT?

https://github.com/llvm/llvm-project/pull/143102