[llvm] [SelectionDAG] Deal with POISON for INSERT_VECTOR_ELT/INSERT_SUBVECTOR (part 1) (PR #143102)

[Björn Pettersson via llvm-commits]

bjope wrote:

So right now, if checking out https://github.com/llvm/llvm-project/pull/143105 (the branch users/bjope/insertundef_4), the only test cases that has a diff compared to the base commit from main are these five:
```
llvm/test/CodeGen/AArch64/arm64-build-vector.ll
llvm/test/CodeGen/AArch64/concat-vector-add-combine.ll
llvm/test/CodeGen/AArch64/sve-fixed-length-frame-offests.ll
llvm/test/CodeGen/X86/pr62286.ll
llvm/test/CodeGen/X86/vector-shuffle-combining.ll
```

At least a couple of those seem trivial. Maybe the last one would be the main concern if any?


https://github.com/llvm/llvm-project/pull/143102