[llvm] [AMDGPU] Support merging 16-bit TBUFFER load/store instruction (PR #145078)
Harrison Hao via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 24 01:30:49 PDT 2025
================
@@ -1040,32 +1040,58 @@ bool SILoadStoreOptimizer::offsetsCanBeCombined(CombineInfo &CI,
if (CI.Offset == Paired.Offset)
return false;
+ // Use 2-byte element size if both tbuffer formats are 16-bit.
+ unsigned EltSize = CI.EltSize;
+ auto Has16BitComponents = [&](unsigned Format) -> bool {
+ const auto *Info = AMDGPU::getGcnBufferFormatInfo(Format, STI);
+ return Info && Info->BitsPerComp == 16;
+ };
+
+ if ((CI.InstClass == TBUFFER_LOAD || CI.InstClass == TBUFFER_STORE)) {
+ // TODO: Support merging 8-bit tbuffer load/store instructions
+ if (Has16BitComponents(CI.Format) && Has16BitComponents(Paired.Format))
+ EltSize = 2;
----------------
harrisonGPU wrote:
Thanks , I have already set `EltSize` in setMI.
https://github.com/llvm/llvm-project/pull/145078
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